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» Delay modelling improvement for low voltage applications
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CASES
2006
ACM
14 years 1 months ago
Methods for power optimization in distributed embedded systems with real-time requirements
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...
ICCAD
1994
IEEE
119views Hardware» more  ICCAD 1994»
13 years 11 months ago
Multi-level network optimization for low power
This paper describes a procedure for minimizing the power consumption in a boolean network under the zero delay model. Power is minimized by modifying the function of each interme...
Sasan Iman, Massoud Pedram
ICS
2009
Tsinghua U.
14 years 2 months ago
Adagio: making DVS practical for complex HPC applications
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
Barry Rountree, David K. Lowenthal, Bronis R. de S...
SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
14 years 17 days ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa
IBPRIA
2003
Springer
14 years 1 months ago
A Colour Tracking Procedure for Low-Cost Face Desktop Applications
In this paper we present an environment for the tracking of a human face obtained from a real video sequence. We will describe the system and discuss the advantages and disadvanta...
Francisco J. Perales López, Ramon Mas, Miqu...