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» Dependable Software: An Oxymoron
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CGO
2008
IEEE
14 years 3 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
ISPASS
2008
IEEE
14 years 3 months ago
Metrics for Architecture-Level Lifetime Reliability Analysis
Abstract— This work concerns metrics for evaluating microarchitectural enhancements to improve processor lifetime reliability. A commonly reported reliability metric is mean time...
Pradeep Ramachandran, Sarita V. Adve, Pradip Bose,...
ISPASS
2008
IEEE
14 years 3 months ago
Configurational Workload Characterization
Although the best processor design for executing a specific workload does depend on the characteristics of the workload, it can not be determined without factoring-in the effect o...
Hashem Hashemi Najaf-abadi, Eric Rotenberg
CODES
2007
IEEE
14 years 3 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
CODES
2007
IEEE
14 years 3 months ago
Predator: a predictable SDRAM memory controller
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
Benny Akesson, Kees Goossens, Markus Ringhofer