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DSD
2002
IEEE
90views Hardware» more  DSD 2002»
14 years 3 months ago
Simplifying Instruction Issue Logic in Superscalar Processors
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
Toshinori Sato, Itsujiro Arita
ICCAD
1995
IEEE
113views Hardware» more  ICCAD 1995»
14 years 1 months ago
Logic decomposition during technology mapping
—A problem in technology mapping is that the quality of the final implementation depends significantly on the initially provided circuit structure. This problem is critical, es...
Eric Lehman, Yosinori Watanabe, Joel Grodstein, He...
CORR
2010
Springer
140views Education» more  CORR 2010»
13 years 10 months ago
Refinement Types for Logical Frameworks and Their Interpretation as Proof Irrelevance
Refinement types sharpen systems of simple and dependent types by offering expressive means to more precisely classify well-typed terms. We present a system of refinement types for...
William Lovas, Frank Pfenning
LISP
2008
97views more  LISP 2008»
13 years 10 months ago
Efficient and flexible access control via Jones-optimal logic program specialisation
We describe the use of a flexible meta-interpreter for performing access control checks on deductive databases. The meta-program is implemented in Prolog and takes as input a datab...
Steve Barker, Michael Leuschel, Mauricio Varea
SAT
2004
Springer
90views Hardware» more  SAT 2004»
14 years 3 months ago
Encoding Global Unobservability for Efficient Translation to SAT
The paper studies the use of global unobservability constraints in a CNF translation of Boolean formulas, where the unobservability of logic blocks is encoded with CNF unobservabil...
Miroslav N. Velev