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ECAI
2004
Springer
14 years 4 months ago
Guiding a Theorem Prover with Soft Constraints
Attempts to use finite models to guide the search for proofs by resolution and the like in first order logic all suffer from the need to trade off the expense of generating and m...
John K. Slaney, Arnold Binas, David Price
ECOOP
2004
Springer
14 years 4 months ago
Evolvable Pattern Implementations Need Generic Aspects
Design patterns are a standard means to create large software systems. However, with standard object-oriented techniques, typical implementations of such patterns are not themselv...
Günter Kniesel, Tobias Rho, Stefan Hanenberg
FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
14 years 4 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
14 years 3 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
CAV
1998
Springer
175views Hardware» more  CAV 1998»
14 years 3 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
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