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» Description Logics in Ontology Applications
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HICSS
2007
IEEE
129views Biometrics» more  HICSS 2007»
14 years 1 months ago
Multi-level Architectural Evolution Management
Software development is a dynamic process where engineers constantly modify and refine systems. As a consequence, system architecture evolves over time. Software architectural ev...
Tien N. Nguyen
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
14 years 1 months ago
Scheduling under resource constraints using dis-equations
Scheduling is an important step in high-level synthesis (HLS). In our tool, we perform scheduling in two steps: coarse-grain scheduling, in which we take into account the whole co...
Hadda Cherroun, Alain Darte, Paul Feautrier
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
14 years 26 days ago
SoC design integration by using automatic interconnection rectification
the interconnection among the IP cores with all description levels This paper presents an automatic interconnection rectification (AIR)technique to correct the misplaced interconne...
Chun-Yao Wang, Shing-Wu Tung, Jing-Yang Jou
VLSID
1999
IEEE
122views VLSI» more  VLSID 1999»
13 years 12 months ago
Formal Verification of an ARM Processor
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
Vishnu A. Patankar, Alok Jain, Randal E. Bryant
VL
1996
IEEE
123views Visual Languages» more  VL 1996»
13 years 11 months ago
GenEd - An Editor with Generic Semantics for Formal Reasoning about Visual Notations
We describe the object-oriented editor GenEd supporting the design of specifications for visual notations. Prominent features of GenEd are (1) it is generic, i.e. domain-specific ...
Volker Haarslev, Michael Wessel