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TACO
2008
130views more  TACO 2008»
13 years 7 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
CC
2009
Springer
106views System Software» more  CC 2009»
14 years 2 months ago
Blind Optimization for Exploiting Hardware Features
Software systems typically exploit only a small fraction of the realizable performance from the underlying microprocessors. While there has been much work on hardware-aware optimiz...
Dan Knights, Todd Mytkowicz, Peter F. Sweeney, Mic...
CCS
2005
ACM
14 years 1 months ago
CPOL: high-performance policy evaluation
Policy enforcement is an integral part of many applications. Policies are often used to control access to sensitive information. Current policy specification languages give users ...
Kevin Borders, Xin Zhao, Atul Prakash
SAS
2000
Springer
149views Formal Methods» more  SAS 2000»
13 years 11 months ago
FULLDOC: A Full Reporting Debugger for Optimized Code
As compilers increasingly rely on optimizations to achieve high performance, the effectiveness of source level debuggers for optimized code continues to falter. Even if values of s...
Clara Jaramillo, Rajiv Gupta, Mary Lou Soffa
EUROPAR
2010
Springer
13 years 9 months ago
Optimized Dense Matrix Multiplication on a Many-Core Architecture
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
Elkin Garcia, Ioannis E. Venetis, Rishi Khan, Guan...