751 search results - page 92 / 151 » Design, Implementation, and Evaluation of Optimizations in a... |
MICRO
2002
IEEE
13 years 7 months ago
2002
IEEE
Power consumption and power density for the Translation Lookaside Buffer (TLB) are important considerations not only in its design, but can have a consequence on cache design as w...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
The Architectural Vulnerability Factor (AVF) of a hardware structure is the probability that a fault in the structure will affect the output of a program. AVF captures both microa...
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
HPCA
1998
IEEE
14 years 1 days ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
IPPS
2000
IEEE
14 years 5 days ago
2000
IEEE
This paper describes the design and implementation on MIMD parallel machines of P-AutoClass, a parallel version of the AutoClass system based upon the Bayesian method for determini...