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» Design, layout and verification of an FPGA using automated t...
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LPAR
2010
Springer
13 years 5 months ago
Synthesis of Trigger Properties
In automated synthesis, we transform a specification into a system that is guaranteed to satisfy the specification. In spite of the rich theory developed for temporal synthesis, l...
Orna Kupferman, Moshe Y. Vardi
APLAS
2010
ACM
13 years 8 months ago
Typechecking Higher-Order Security Libraries
Abstract. We propose a flexible method for verifying the security of ML programs that use cryptography and recursive data structures. Our main applications are X.509 certificate ch...
Karthikeyan Bhargavan, Cédric Fournet, Nata...
DAC
2003
ACM
14 years 8 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
SIMUTOOLS
2008
13 years 9 months ago
Transforming sources to petri nets: a way to analyze execution of parallel programs
Model checking is a suitable formal technique to analyze parallel programs' execution in an industrial context because automated tools can be designed and operated with very ...
Jean-Baptiste Voron, Fabrice Kordon
SIGSOFT
2006
ACM
14 years 1 months ago
Detecting increases in feature coupling using regression tests
Repeated changes to a software system can introduce small weaknesses such as unplanned dependencies between different parts of the system. While such problems usually go undetecte...
Olivier Giroux, Martin P. Robillard