As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watew...
We have developed a simulator to help with the design and evaluation of assistive interfaces. The simulator can predict possible interaction patterns when undertaking a task using...
Abstract. The topological design of distributed packet switched networks consists of finding a topology that minimizes the communication costs by taking into account a certain num...
Large displays are becoming increasingly common technologies in the workplace because of their potential as information displays and collaboration surfaces. Despite its growing ub...
Elaine M. Huang, Elizabeth D. Mynatt, Daniel M. Ru...
Scheduling collective communications (CC) in networks based on optimal graphs and digraphs has been done with the use of the evolutionary techniques. Inter-node communication patt...