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CONIELECOMP
2011
IEEE
13 years 8 days ago
FPGA design and implementation for vertex extraction of polygonal shapes
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduce...
Jorge Martínez-Carballido, Jorge Guevara-Es...
TVLSI
2008
133views more  TVLSI 2008»
13 years 8 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
ISCA
1994
IEEE
104views Hardware» more  ISCA 1994»
14 years 24 days ago
Exploring the Design Space for a Shared-Cache Multiprocessor
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
Basem A. Nayfeh, Kunle Olukotun
CHI
2007
ACM
14 years 9 months ago
CarLoop: leveraging common ground to develop long-term carpools
We developed and tested a website and public display to connect and sustain carpoolers in the workplace. We arrived at this design through study of traffic congestion and its caus...
Joshua Morse, Joshua Palay, Yarun Luon, Satyendra ...
FSE
2006
Springer
95views Cryptology» more  FSE 2006»
14 years 11 days ago
Cryptanalysis of Achterbahn
We present several attacks against Achterbahn, one of the new stream ciphers proposed to the eSTREAM competition. Our best attack breaks the reduced version of the cipher with comp...
Thomas Johansson, Willi Meier, Frédé...