Sciweavers

79 search results - page 3 / 16
» Design Space Exploration for Massively Parallel Processor Ar...
Sort
View
IPPS
2002
IEEE
13 years 12 months ago
Massively Parallel Solutions for Molecular Sequence Analysis
In this paper we present new approaches to high performance protein database scanning on two novel massively parallel architectures to gain supercomputer power at low cost. The ï¬...
Bertil Schmidt, Heiko Schröder, Manfred Schim...
ICPPW
2006
IEEE
14 years 1 months ago
Retargeting Image-Processing Algorithms to Varying Processor Grain Sizes
Embedded computing architectures can be designed to meet a variety of application specific requirements. However, optimized hardware can require compiler support to realize the po...
Sam Sander, Linda M. Wills
DAC
1999
ACM
14 years 8 months ago
Power Efficient Mediaprocessors: Design Space Exploration
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
Johnson Kin, Chunho Lee, William H. Mangione-Smith...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
14 years 17 days ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
IPPS
2006
IEEE
14 years 1 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...