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PCRCW
1997
Springer
13 years 11 months ago
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Law...
ICPP
1997
IEEE
13 years 11 months ago
How Much Does Network Contention Affect Distributed Shared Memory Performance?
Most of recent research on distributed shared memory (DSM)systems have focused on either careful design of node controllersor cache coherenceprotocols. Whileevaluating these desig...
Donglai Dai, Dhabaleswar K. Panda
MICRO
2002
IEEE
122views Hardware» more  MICRO 2002»
14 years 11 days ago
Microarchitectural denial of service: insuring microarchitectural fairness
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
Dirk Grunwald, Soraya Ghiasi
ISBI
2006
IEEE
14 years 8 months ago
Fast marching method to correct for refraction in ultrasound computed tomography
A significant obstacle in the advancement of Ultrasound Computed Tomography has been the lack of efficient and precise methods for the tracing of the bent rays that result from th...
Shengying Li, Klaus Mueller, Marcel Jackowski, Don...
DAC
2012
ACM
11 years 9 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra