665 search results - page 24 / 133 » Design and Analysis of a Dynamically Reconfigurable Network ... |
FPL
2006
Springer
14 years 20 days ago
2006
Springer
In this paper we present the design and implementation of a dynamically reconfigurable system for packet queue scheduling. Two widely accepted queue schedulers have been implement...
FPL
2008
Springer
13 years 10 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
ERSA
2007
13 years 10 months ago
2007
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
DDECS
2007
IEEE
14 years 3 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
LCN
2005
IEEE
14 years 2 months ago
2005
IEEE
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...