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ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 7 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
HYBRID
2009
Springer
14 years 1 months ago
Specification and Analysis of Network Resource Requirements of Control Systems
We focus on control systems in which sensors send data to actuators via a bus shared with other applications. An approach is proposed for specifying and implementing dynamic schedu...
Gera Weiss, Sebastian Fischmeister, Madhukar Anand...
INFOCOM
2007
IEEE
14 years 3 months ago
Reduction of Quality (RoQ) Attacks on Dynamic Load Balancers: Vulnerability Assessment and Design Tradeoffs
—One key adaptation mechanism often deployed in networking and computing systems is dynamic load balancing. The goal from employing dynamic load balancers is to ensure that the o...
Mina Guirguis, Azer Bestavros, Ibrahim Matta, Yuti...
DSN
2011
IEEE
12 years 9 months ago
Cross-layer resilience using wearout aware design flow
—As process technology shrinks devices, circuits experience accelerated wearout. Monitoring wearout will be critical for improving the efficiency of error detection and correctio...
Bardia Zandian, Murali Annavaram
ERSA
2006
113views Hardware» more  ERSA 2006»
13 years 10 months ago
Efficient FPGA-based Implementations of the MIMO-OFDM Physical Layer
- In this paper, we present a prototype FPGA design for an efficient physical layer implementation of a MIMO-OFDM technique. We propose a pipelined architecture using a Fast Fourie...
Jeoong Sung Park, Hong-Jip Jung, Viktor K. Prasann...