Sciweavers

665 search results - page 6 / 133
» Design and Analysis of a Dynamically Reconfigurable Network ...
Sort
View
ANCS
2005
ACM
14 years 1 months ago
Design considerations for network processor operating systems
Network processors (NPs) promise a flexible, programmable packet processing infrastructure for network systems. To make full use of the capabilities of network processors, it is ...
Tilman Wolf, Ning Weng, Chia-Hui Tai
ERSA
2006
91views Hardware» more  ERSA 2006»
13 years 9 months ago
Intrinsic Embedded Hardware Evolution of Block-based Neural Networks
- An intrinsic embedded online evolution system has been designed using Block-based neural networks and implemented on Xilinx VirtexIIPro FPGAs. The designed network can dynamicall...
Saumil Merchant, Gregory D. Peterson, Seong Kong
JEC
2006
107views more  JEC 2006»
13 years 7 months ago
A dynamically reconfigurable cache for multithreaded processors
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...
Alex Settle, Dan Connors, Enric Gibert, Antonio Go...
DATE
2005
IEEE
134views Hardware» more  DATE 2005»
14 years 1 months ago
Assertion-Based Design Exploration of DVS in Network Processor Architectures
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 000...
TVLSI
2008
187views more  TVLSI 2008»
13 years 7 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...