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» Design and Analysis of a Robust Pipelined Memory System
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TCAD
2008
75views more  TCAD 2008»
13 years 7 months ago
Static Analysis of Transaction-Level Communication Models
We propose a methodology for the early estimation of communication implementation choices eftarting from an abstract transaction level system model (TLM). The reference version of ...
Giovanni Agosta, Francesco Bruschi, Donatella Sciu...
BMCBI
2006
131views more  BMCBI 2006»
13 years 7 months ago
The statistics of identifying differentially expressed genes in Expresso and TM4: a comparison
Background: Analysis of DNA microarray data takes as input spot intensity measurements from scanner software and returns differential expression of genes between two conditions, t...
Allan A. Sioson, Shrinivasrao P. Mane, Pinghua Li,...
CDC
2008
IEEE
216views Control Systems» more  CDC 2008»
14 years 2 months ago
Robust limit cycle control in an attitude control system with switching-constrained actuators
Abstract— In this paper the robust behavior in some piecewise affine systems with minimally spaced transition times is studied. Such systems are found e.g. in satellites and sat...
Alexandre R. Mesquita, Karl Heinz Kienitz, Erico L...
LCTRTS
1998
Springer
13 years 12 months ago
Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
Thomas Lundqvist, Per Stenström
ICTAC
2009
Springer
14 years 2 months ago
A Deadlock-Free Semantics for Shared Memory Concurrency
Abstract. We design a deadlock-free semantics for a concurrent, functional and imperative programming language where locks are implicitly and univocally associated with pointers. T...
Gérard Boudol