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» Design and Analysis of a Robust Pipelined Memory System
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IPPS
2007
IEEE
14 years 1 months ago
Improving Scalability of OpenMP Applications on Multi-core Systems Using Large Page Support
Modern multi-core architectures have become popular because of the limitations of deep pipelines and heating and power concerns. Some of these multi-core architectures such as the...
Ranjit Noronha, Dhabaleswar K. Panda
TPDS
2010
260views more  TPDS 2010»
13 years 6 months ago
Real-Time Modeling of Wheel-Rail Contact Laws with System-On-Chip
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...
Yongji Zhou, T. X. Mei, Steven Freear
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
14 years 29 days ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
ISOLA
2010
Springer
13 years 6 months ago
A Linked Data Approach to Sharing Workflows and Workflow Results
A bioinformatics analysis pipeline is often highly elaborate, due to the inherent complexity of biological systems and the variety and size of laboratory publications would be high...
Marco Roos, Sean Bechhofer, Jun Zhao, Paolo Missie...
SRDS
2003
IEEE
14 years 28 days ago
Group Communication Protocols under Errors
Group communication protocols constitute a basic building block for highly dependable distributed applications. Designing and correctly implementing a group communication system (...
Claudio Basile, Long Wang, Zbigniew Kalbarczyk, Ra...