Sciweavers

761 search results - page 4 / 153
» Design and Analysis of a Robust Pipelined Memory System
Sort
View
EDBT
1992
ACM
111views Database» more  EDBT 1992»
13 years 11 months ago
Pipelined Query Processing in the DBGraph Storage Model
The DBGraph storage model, designed for main memory DBMS, ensures both data storage compactness and efficient processing for all database operations. By representing the entire da...
Philippe Pucheral, Jean-Marc Thévenin
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
13 years 5 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
EXPCS
2007
13 years 9 months ago
Pipeline spectroscopy
Pipeline Spectroscopy is a new technique that allows us to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogram, which represents a precis...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
ASPDAC
1998
ACM
49views Hardware» more  ASPDAC 1998»
13 years 11 months ago
Unrolling Loops With Indeterminate Loop Counts in System Level Pipelines
This paper describes the unrolling of loops with indeterminate loop counts in system level pipelines. Two methods are discussed in this paper. The first method is the varied latenc...
Hui Guo, Sri Parameswaran
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 4 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...