761 search results - page 71 / 153 » Design and Analysis of a Robust Pipelined Memory System |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
ESA
1998
Springer
13 years 11 months ago
1998
Springer
Abstract. Data sets in large applications are often too massive to t completely inside the computer's internal memory. The resulting input output communication or I O between ...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
EUROSYS
2010
ACM
14 years 1 months ago
2010
ACM
The deluge of huge data sets such as those provided by
sensor networks, online transactions, and the web provide
exciting opportunities for data analysis. The scale of the
data ...