Sciweavers

1084 search results - page 110 / 217
» Design and Evaluation of a Selective Compressed Memory Syste...
Sort
View
PCRCW
1997
Springer
15 years 8 months ago
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Law...
FCCM
2008
IEEE
114views VLSI» more  FCCM 2008»
15 years 11 months ago
Scaling Soft Processor Systems
As FPGA-based systems including soft-processors become increasingly common we are motivated to better understand the best way to scale the performance of such systems. In this pap...
Martin Labrecque, Peter Yiannacouras, J. Gregory S...
DAC
2012
ACM
13 years 7 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
CODES
2006
IEEE
15 years 10 months ago
Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies
Real-time multi-media applications are increasingly being mapped onto MPSoC (multi-processor system-on-chip) platforms containing hardware-software IPs (intellectual property) alo...
Minyoung Kim, Sudarshan Banerjee, Nikil Dutt, Nali...
SSS
2007
Springer
130views Control Systems» more  SSS 2007»
15 years 10 months ago
Decentralized Detector Generation in Cooperative Intrusion Detection Systems
We consider Cooperative Intrusion Detection System (CIDS) which is a distributed AIS-based (Artificial Immune System) IDS where nodes collaborate over a peer-to-peer overlay netwo...
Rainer Bye, Katja Luther, Seyit Ahmet Çamte...