Sciweavers

1084 search results - page 34 / 217
» Design and Evaluation of a Selective Compressed Memory Syste...
Sort
View
ETS
2007
IEEE
91views Hardware» more  ETS 2007»
15 years 10 months ago
PPM Reduction on Embedded Memories in System on Chip
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
Said Hamdioui, Zaid Al-Ars, Javier Jiménez,...
149
Voted
GLVLSI
2007
IEEE
172views VLSI» more  GLVLSI 2007»
15 years 10 months ago
The effect of temperature on cache size tuning for low energy embedded systems
Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for about 40% or more of the total energy consumed in t...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...
EUROPAR
2005
Springer
15 years 9 months ago
Integrating Mobile Devices into the Grid: Design Considerations and Evaluation
Mobile devices increasingly offer functionality beyond the one provided by traditional resources – processor, memory and applications. This includes, for example, integrated mul...
Stavros Isaiadis, Vladimir Getov
AAAIDEA
2005
IEEE
15 years 9 months ago
Design and Evaluation of Diffserv Functionalities in the MPLS Edge Router Architecture
—Differentiated Service (DiffServ) in combination with Multi-Protocol Label Switching (MPLS) is a promising technology in converting the best-effort Internet into a QoS-capable n...
Wei-Chu Lai, Kuo-Ching Wu, Ting-Chao Hou
ICANN
2005
Springer
15 years 9 months ago
A Model for Hierarchical Associative Memories via Dynamically Coupled GBSB Neural Networks
Many approaches have emerged in the attempt to explain the memory process. One of which is the Theory of Neuronal Group Selection (TNGS), proposed by Edelman [1]. In the present wo...
Rogério M. Gomes, Antônio de Pá...