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ACMMSP
2004
ACM
125views Hardware» more  ACMMSP 2004»
15 years 9 months ago
Improving trace cache hit rates using the sliding window fill mechanism and fill select table
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
Muhammad Shaaban, Edward Mulrane
TSP
2010
14 years 10 months ago
Variance-component based sparse signal reconstruction and model selection
We propose a variance-component probabilistic model for sparse signal reconstruction and model selection. The measurements follow an underdetermined linear model, where the unknown...
Kun Qiu, Aleksandar Dogandzic
FPL
2000
Springer
119views Hardware» more  FPL 2000»
15 years 7 months ago
A Self-Reconfigurable Gate Array Architecture
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...
TMC
2012
13 years 6 months ago
Compressed-Sensing-Enabled Video Streaming for Wireless Multimedia Sensor Networks
—This article1 presents the design of a networked system for joint compression, rate control and error correction of video over resource-constrained embedded devices based on the...
Scott Pudlewski, Arvind Prasanna, Tommaso Melodia
NIXDORF
1992
116views Hardware» more  NIXDORF 1992»
15 years 8 months ago
Programmable Active Memories: A Performance Assessment
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
Patrice Bertin, Didier Roncin, Jean Vuillemin