127 search results - page 19 / 26 » Design and Implementation of Power-Aware Virtual Memory |
ICS
2004
Tsinghua U.
14 years 26 days ago
2004
Tsinghua U.
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
GPCE
2007
Springer
14 years 1 months ago
2007
Springer
Multiple dispatch – the selection of a function to be invoked based on the dynamic type of two or more arguments – is a solution to several classical problems in object-orient...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
ICDCS
2007
IEEE
14 years 1 months ago
2007
IEEE
Record and Replay (RR) is a software based state replication solution designed to support recording and subsequent replay of the execution of unmodified applications running on mu...
ECOOP
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. While real-time garbage collection is now available in production virtual machines, the lack of generational capability means applications with high allocation rates are ...