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DELTA
2006
IEEE
13 years 11 months ago
Modified Montgomery Modular Multiplication Using 4: 2 Compressor and CSA Adder
The efficiency of the Public Key encryption systems like RSA and ECC can be improved with the adoption of a faster multiplication scheme. In this paper, Modified Montgomery multip...
Himanshu Thapliyal, Anvesh Ramasahayam, Vivek Redd...
ISLPED
1999
ACM
160views Hardware» more  ISLPED 1999»
13 years 11 months ago
Mixed-swing quadrail for low power dual-rail domino logic
This paper describes a new mixed-swing topology for dual-rail domino logic that results in a simultaneous energy and delay reduction. HSPICE simulation results for a 1-bit full ad...
Bharath Ramasubramanian, Herman Schmit, L. Richard...
TC
2010
13 years 2 months ago
Faster Interleaved Modular Multiplication Based on Barrett and Montgomery Reduction Methods
This paper proposes two improved interleaved modular multiplication algorithms based on Barrett and Montgomery modular reduction. The algorithms are simple and especially suitable ...
Miroslav Knezevic, Frederik Vercauteren, Ingrid Ve...
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 1 months ago
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
IEICET
2008
106views more  IEICET 2008»
13 years 7 months ago
Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Comm
Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters a...
Jimson Mathew, R. Mahesh, A. Prasad Vinod, Edmund ...