47 search results - page 6 / 10 » Design and Implementation of Scalable Low-Power Montgomery M... |
RECONFIG
2008
IEEE
14 years 1 months ago
2008
IEEE
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
KES
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. An energy-efficient power-aware design is highly desirable for digital signal processing functions that encounter a wide diversity of operating scenarios in battery-power...
ISVLSI
2002
IEEE
14 years 13 days ago
2002
IEEE
Modular inverse computation is needed in several public key cryptographic applications. In this work, we present two VLSI hardware implementations used in the calculation of Montg...
INFOCOM
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract—In this paper we address the problem of energyefficient event detection in wireless sensor networks (WSNs). Duty cycling is a fundamental approach to conserving energy i...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
Booth encoding is believed to yield faster multiplier designs with higher energy consumption. 16x16-bit Booth and NonBooth multipliers are analyzed in energy and delay space under...