Sciweavers

222 search results - page 27 / 45
» Design and Implementation of Semi-preemptible IO
Sort
View
SIGCOMM
2010
ACM
13 years 10 months ago
PacketShader: a GPU-accelerated software router
We present PacketShader, a high-performance software router framework for general packet processing with Graphics Processing Unit (GPU) acceleration. PacketShader exploits the mas...
Sangjin Han, Keon Jang, KyoungSoo Park, Sue B. Moo...
TVLSI
2002
118views more  TVLSI 2002»
13 years 9 months ago
A microcoded elliptic curve processor using FPGA technology
The implementation of a microcoded elliptic curve processor using field-programmable gate array technology is described. This processor implements optimal normal basis field operat...
Philip Heng Wai Leong, Ivan K. H. Leung
IEEEPACT
2009
IEEE
14 years 4 months ago
Analytical Modeling of Pipeline Parallelism
Parallel programming is a requirement in the multi-core era. One of the most promising techniques to make parallel programming available for the general users is the use of parall...
Angeles G. Navarro, Rafael Asenjo, Siham Tabik, Ca...
HPCC
2007
Springer
14 years 4 months ago
A Windows-Based Parallel File System
Parallel file systems are widely used in clusters to provide high performance I/O. However, most of the existing parallel file systems are based on UNIX-like operating systems. W...
Lungpin Yeh, Juei-Ting Sun, Sheng-Kai Hung, Yarsun...
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 4 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...