243 search results - page 19 / 49 » Design and Implementation of a CFAR Processor for Target Det... |
HPCA
2005
IEEE
14 years 1 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
DSN
2005
IEEE
14 years 1 months ago
2005
IEEE
Network routers occupy a key role in modern data transport and consequently are attractive targets for attackers. By manipulating, diverting or dropping packets arriving at a comp...
SPAA
2010
ACM
14 years 14 days ago
2010
ACM
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most TM systems have been designed to efficientl...
CNSR
2008
IEEE
14 years 2 months ago
2008
IEEE
Attacks and intrusions to information systems cause large revenue losses. The prevention of these attacks is not always possible by just considering information from isolated sour...
PPOPP
2006
ACM
14 years 1 months ago
2006
ACM
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...