71 search results - page 12 / 15 » Design and Implementation of a High Speed Microprocessor Sim... |
INFOCOM
2007
IEEE
14 years 2 months ago
2007
IEEE
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
DATE
1998
IEEE
13 years 12 months ago
1998
IEEE
This paper presents a VLSI Architecture to implement the forward and inverse 2-D Discrete Wavelet Transform (FDWT/IDWT), to compress medical images for storage and retrieval. Loss...
NOSSDAV
2004
Springer
14 years 1 months ago
2004
Springer
Despite many years of research, fair queuing still faces a number of implementation challenges in high speed routers. In particular, in spite of proposals such as DiffServ, the st...
WOWMOM
2005
ACM
14 years 1 months ago
2005
ACM
Ad-hoc wireless networks with multi-rate radios (such as 802.11a, b, g) require a new class of MAC/PHY aware metrics that take into account factors such as physical-layer link spe...
CF
2006
ACM
13 years 11 months ago
2006
ACM
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...