Sciweavers

71 search results - page 8 / 15
» Design and Implementation of a High Speed Microprocessor Sim...
Sort
View
ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
13 years 11 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
PCRCW
1997
Springer
13 years 12 months ago
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Law...
INFOCOM
1999
IEEE
14 years 5 hour ago
A Model for Window Based Flow Control in Packet-Switched Networks
Recently, networks have increased rapidly both in scale and speed. Problems related to the control and management are of increasing interest. The average throughput and end-to-end ...
Xiaowei Yang
WINET
2010
113views more  WINET 2010»
13 years 6 months ago
Designing multihop wireless backhaul networks with delay guarantees
— As wireless access technologies improve in data rates, the problem focus is shifting towards providing adequate backhaul from the wireless access points to the Internet. Existi...
Girija J. Narlikar, Gordon T. Wilfong, Lisa Zhang
ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
13 years 12 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick