Sciweavers

1224 search results - page 158 / 245
» Design and Implementation of a Practical Parallel Delaunay A...
Sort
View
INFOCOM
2010
IEEE
15 years 2 months ago
Distributed Resource Allocation for Synchronous Fork and Join Processing Networks
—Many emerging information processing applications require applying various fork and join type operations such as correlation, aggregation, and encoding/decoding to data streams ...
Haiquan (Chuck) Zhao, Cathy H. Xia, Zhen Liu, Dona...
138
Voted
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
15 years 10 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
ICDCS
2008
IEEE
15 years 10 months ago
Availability and Fairness Support for Storage QoS Guarantee
Multi-dimensional storage virtualization (MDSV) allows multiple virtual disks, each with a distinct combination of capacity, latency and bandwidth requirements, to be multiplexed ...
Gang Peng, Tzi-cker Chiueh
CAV
2008
Springer
131views Hardware» more  CAV 2008»
15 years 6 months ago
Validating High-Level Synthesis
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
FPL
2010
Springer
188views Hardware» more  FPL 2010»
15 years 2 months ago
SeqHive: A Reconfigurable Computer Cluster for Genome Re-sequencing
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
Kristian Stevens, Henry Chen, Terry Filiba, Peter ...