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159
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DATE
2004
IEEE
15 years 8 months ago
2004
IEEE
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
108
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CJ
2010
15 years 4 months ago
2010
rder logic (HOL) theorem prover. The high ability of abstraction in the HOL verification system allows its use for the verification task over the whole design path of the circuit, ...
150
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RECONFIG
2008
IEEE
15 years 11 months ago
2008
IEEE
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
112
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ISVLSI
2006
IEEE
15 years 10 months ago
2006
IEEE
Due to increasing design complexity new methodologies for system modeling have been established in VLSI CAD. The SystemC methodology gains a significant reduction of design cycle...
170
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CL
2010
Springer
15 years 4 months ago
2010
Springer
In this paper we present the syntax, semantics, and compilation of a new system-level programming language called SystemJ. SystemJ is a multiclock language supporting the Globally...