164 search results - page 22 / 33 » Design and Implementation of the Memory Scheduler for the PC... |
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
JMLR
2010
13 years 3 months ago
2010
The FastInf C++ library is designed to perform memory and time efficient approximate inference in large-scale discrete undirected graphical models. The focus of the library is pro...
EPIA
1999
Springer
14 years 1 months ago
1999
Springer
YapOr is an or-parallel system that extends the Yap Prolog system to exploit implicit or-parallelism in Prolog programs. It is based on the environment copying model, as first imp...
RTSS
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper presents the design of user-level scheduling hierarchies in the Composite component-based system. The motivation for this is centered around the design of a system that...
ARCS
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. The SoC (System-on-Chip) technology is used in small and flexible consumer electronic devices. SoCs include one or more microcontroller, memory, programmable logic, and ...