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» Design and Implementation of the TRIPS Primary Memory System
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ISMVL
2008
IEEE
134views Hardware» more  ISMVL 2008»
14 years 1 months ago
Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells
Nanoscale multiple-valued logic systems require the development of nanometer scale integrated circuits and components. Due to limits in device physics, new components must be deve...
Theodore W. Manikas, Dale Teeters
VLSISP
2008
239views more  VLSISP 2008»
13 years 7 months ago
An Embedded Real-Time Surveillance System: Implementation and Evaluation
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological op...
Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Pe...
BMCBI
2007
108views more  BMCBI 2007»
13 years 7 months ago
Design and implementation of a generalized laboratory data model
Background: Investigators in the biological sciences continue to exploit laboratory automation methods and have dramatically increased the rates at which they can generate data. I...
Michael C. Wendl, Scott Smith, Craig S. Pohl, Davi...
SPAA
2010
ACM
14 years 5 days ago
Implementing and evaluating nested parallel transactions in software transactional memory
Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications. To date, most TM systems have been designed to efficientl...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...
VLDB
2001
ACM
149views Database» more  VLDB 2001»
13 years 11 months ago
Cache-Conscious Concurrency Control of Main-Memory Indexes on Shared-Memory Multiprocessor Systems
Recent research addressed the importance of optimizing L2 cache utilization in the design of main memory indexes and proposed the so-called cache-conscious indexes such as the CSB...
Sang Kyun Cha, Sangyong Hwang, Kihong Kim, Keunjoo...