Sciweavers

862 search results - page 129 / 173
» Design and Implementation of the TRIPS Primary Memory System
Sort
View
PPOPP
1990
ACM
13 years 11 months ago
Multi-Model Parallel Programming in Psyche
Many different parallel programming models, including lightweight processes that communicate with shared memory and heavyweight processes that communicate with messages, have been...
Michael L. Scott, Thomas J. LeBlanc, Brian D. Mars...
FAST
2003
13 years 8 months ago
Block-Level Security for Network-Attached Disks
We propose a practical and efficient method for adding security to network-attached disks (NADs). In contrast to previous work, our design requires no changes to the data layout ...
Marcos Kawazoe Aguilera, Minwen Ji, Mark Lillibrid...
OSDI
2000
ACM
13 years 8 months ago
Policies for Dynamic Clock Scheduling
Pocket computers are beginning to emerge that provide sufficient processing capability and memory capacity to run traditional desktop applications and operating systems on them. T...
Dirk Grunwald, Philip Levis, Keith I. Farkas, Char...
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
14 years 21 days ago
Automatic Generation of Simulation Monitors from Quantitative Constraint Formula
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 21 days ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen