Sciweavers

862 search results - page 35 / 173
» Design and Implementation of the TRIPS Primary Memory System
Sort
View
PPOPP
2006
ACM
14 years 2 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
ICWS
2009
IEEE
14 years 5 months ago
Adaptive Prefetching Scheme Using Web Log Mining in Cluster-Based Web Systems
The main memory management has been a critical issue to provide high performance in web cluster systems. To overcome the speed gap between processors and disks, many prefetch sche...
Heung Ki Lee, Baik Song An, Eun Jung Kim
ANSOFT
2002
126views more  ANSOFT 2002»
13 years 8 months ago
The Real-Time Process Algebra (RTPA)
Abstract. The real-time process algebra (RTPA) is a set of new mathematical notations for formally describing system architectures, and static and dynamic behaviors. It is recogniz...
Yingxu Wang
DAC
2007
ACM
14 years 9 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
TODAES
2008
158views more  TODAES 2008»
13 years 8 months ago
Designing secure systems on reconfigurable hardware
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
Ted Huffmire, Brett Brotherton, Nick Callegari, Jo...