Sciweavers

446 search results - page 64 / 90
» Design and Implementation of the Valid Time for Spatio-Tempo...
Sort
View
WSC
2004
13 years 9 months ago
Parallel Discrete Event Simulation of Space Shuttle Operations
This paper describes the application of parallel simulation techniques to represent structured functional parallelism present within the Space Shuttle Operations Flow, utilizing t...
José A. Sepúlveda, Luis C. Rabelo, M...
DEXA
2009
Springer
127views Database» more  DEXA 2009»
14 years 2 months ago
The Real Performance Drivers behind XML Lock Protocols
Abstract. Fine-grained lock protocols should allow for highly concurrent transaction processing on XML document trees, which is addressed by the taDOM lock protocol family enabling...
Sebastian Bächle, Theo Härder
EDBT
2009
ACM
208views Database» more  EDBT 2009»
14 years 3 months ago
Flexible and efficient querying and ranking on hyperlinked data sources
There has been an explosion of hyperlinked data in many domains, e.g., the biological Web. Expressive query languages and effective ranking techniques are required to convert this...
Ramakrishna Varadarajan, Vagelis Hristidis, Louiqa...
IOLTS
2009
IEEE
174views Hardware» more  IOLTS 2009»
14 years 2 months ago
ATPG-based grading of strong fault-secureness
—Robust circuit design has become a major concern for nanoscale technologies. As a consequence, for design validation, not only the functionality of a circuit has to be considere...
Marc Hunger, Sybille Hellebrand, Alejandro Czutro,...
DATE
2003
IEEE
69views Hardware» more  DATE 2003»
14 years 1 months ago
Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
Ulrich Seidl, Klaus Eckl, Frank M. Johannes