254 search results - page 7 / 51 » Design and VLSI Implementation of a Unified Synapse-Neuron A... |
GLVLSI
2003
IEEE
14 years 21 days ago
2003
IEEE
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
ISCAS
1993
IEEE
13 years 11 months ago
1993
IEEE
- A novel VLSI implementation of the Viterbi algorithm based on a cascade architecture is presented. Survivor sequence memory management is implemented using a new single read poin...
ICCCN
2007
IEEE
13 years 11 months ago
2007
IEEE
While research on cross-layer network optimization has been progressing, useful implementations have been lagging because the current Internet architecture does not accommodate cro...
JCP
2008
13 years 7 months ago
2008
This paper presents a high throughput VLSI architecture for Blackman windowing. Since most of the implementation of windowing functions for real time applications, are based on eit...
ICIP
2004
IEEE
14 years 9 months ago
2004
IEEE
H.264/AVC is a new international standard for the compression of natural video images, in which a deblocking filter has been adopted to remove blocking artifacts. In this paper, w...