184 search results - page 10 / 37 » Design and chip implementation of the ubiquitous processor H... |
JNCA
2007
13 years 6 months ago
2007
As the line rates standards are changing frequently to provide higher bit rates, the routers design has become very challenging due to the need for new wire-speed router’s netwo...
FCCM
2004
IEEE
13 years 10 months ago
2004
IEEE
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
WMPI
2004
ACM
14 years 6 days ago
2004
ACM
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
ERSA
2008
13 years 8 months ago
2008
Coarse-grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine for various types of System-on-Ch...
HPCA
2011
IEEE
12 years 10 months ago
2011
IEEE
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...