HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor

Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained parallelism, hardware queues have been proposed to reduce overhead of communication between cores. Hardware queues require modifications to the processor core and need a custom interconnect. They also pose difficulties for the operating system because their state must be preserved across context switches. To solve these problems, we propose a hardware-accelerated queue, or HAQu. HAQu adds hardware to a CMP that accelerates operations on software queues. Our design implements fast queueing through an application’s address space with operations that are compatible with a fully software queue. Our design provides accelerated and OS-transparent performance in three general ways: (1) it provides a single instruction for enqueueing and dequeueing which significantly reduces the overhead when used in fine-grained thr...

• Type: Journal
• Year: 2011
• Where: HPCA
• Authors: Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tuck
• Keywords: Address Space, Distributed And Parallel Computing, Hardware, HPCA 2011, Software Queue