184 search results - page 35 / 37 » Design and chip implementation of the ubiquitous processor H... |
ASPLOS
2008
ACM
13 years 8 months ago
2008
ACM
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
CASES
2008
ACM
13 years 8 months ago
2008
ACM
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
ICS
2010
Tsinghua U.
13 years 9 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
SIGCOMM
2009
ACM
14 years 1 months ago
2009
ACM
New protocols for the data link and network layer are being proposed to address limitations of current protocols in terms of scalability, security, and manageability. High-speed r...
DCC
2007
IEEE
14 years 6 months ago
2007
IEEE
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...