184 search results - page 4 / 37 » Design and chip implementation of the ubiquitous processor H... |
HPCA
2011
IEEE
12 years 10 months ago
2011
IEEE
Translation Lookaside Buffers (TLBs) are critical to processor performance. Much past research has addressed uniprocessor TLBs, lowering access times and miss rates. However, as c...
DAGSTUHL
2007
13 years 8 months ago
2007
Abstract. Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed eï¬...
ICIP
1994
IEEE
14 years 8 months ago
1994
IEEE
In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been i...
JIRS
2007
13 years 6 months ago
2007
A detailed step-by-step approach is presented to optimize, standardize, and automate the process of unmanned vehicle controller design, evaluation, validation and verification, fol...
ISVLSI
2003
IEEE
13 years 12 months ago
2003
IEEE
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...