184 search results - page 7 / 37 » Design and chip implementation of the ubiquitous processor H... |
SIGARCH
2008
13 years 7 months ago
2008
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
HICSS
2006
IEEE
14 years 1 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
Although x86 processors have been around for a long time and are the most ubiquitous processors in the world, the amount of academic research regarding details of their performanc...
ARITH
2001
IEEE
13 years 11 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
ARVLSI
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...