Sciweavers

620 search results - page 61 / 124
» Design and evaluation of an auto-memoization processor
Sort
View
JMLR
2006
80views more  JMLR 2006»
15 years 4 months ago
Using Machine Learning to Guide Architecture Simulation
An essential step in designing a new computer architecture is the careful examination of different design options. It is critical that computer architects have efficient means by ...
Greg Hamerly, Erez Perelman, Jeremy Lau, Brad Cald...
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 8 months ago
Performance Characterization of a Quad Pentium Pro SMP using OLTP Workloads
Commercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these diffe...
Kimberly Keeton, David A. Patterson, Yong Qiang He...
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 8 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
ASPLOS
1992
ACM
15 years 8 months ago
Application-Controlled Physical Memory using External Page-Cache Management
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MIPS range or higher. While this trend suggests that memory management for most p...
Kieran Harty, David R. Cheriton
IWOMP
2010
Springer
15 years 6 months ago
How OpenMP Applications Get More Benefit from Many-Core Era
With the approaching of the many-core era, it becomes more and more difficult for a single OpenMP application to efficiently utilize all the available processor cores. On the other...
Jianian Yan, Jiangzhou He, Wentao Han, Wenguang Ch...