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» Design and evaluation of an auto-memoization processor
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ATS
2010
IEEE
261views Hardware» more  ATS 2010»
15 years 2 months ago
The Test Ability of an Adaptive Pulse Wave for ADC Testing
In the conventional ADC production test method, a high-quality analogue sine wave is applied to the Analogue-toDigital Converter (ADC), which is expensive to generate. Nowadays, an...
Xiaoqin Sheng, Hans G. Kerkhoff
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
15 years 2 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
HPCA
2011
IEEE
14 years 8 months ago
Shared last-level TLBs for chip multiprocessors
Translation Lookaside Buffers (TLBs) are critical to processor performance. Much past research has addressed uniprocessor TLBs, lowering access times and miss rates. However, as c...
Abhishek Bhattacharjee, Daniel Lustig, Margaret Ma...
ASPLOS
2012
ACM
13 years 12 months ago
Scalable address spaces using RCU balanced trees
Software developers commonly exploit multicore processors by building multithreaded software in which all threads of an application share a single address space. This shared addre...
Austin T. Clements, M. Frans Kaashoek, Nickolai Ze...
HPCA
2012
IEEE
13 years 11 months ago
Flexible register management using reference counting
Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. We ...
Steven Battle, Andrew D. Hilton, Mark Hempstead, A...