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» Design and evaluation of an auto-memoization processor
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ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
13 years 12 months ago
High-Bandwidth Address Translation for Multiple-Issue Processors
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
Todd M. Austin, Gurindar S. Sohi
SQJ
2008
96views more  SQJ 2008»
13 years 6 months ago
Evaluating pattern conformance of UML models: a divide-and-conquer approach and case studies
A design pattern is realized in various forms depending on the context of the applications. There has been intensive research on detecting pattern instances in models and in implem...
Dae-Kyoo Kim, Wuwei Shen
IPPS
1998
IEEE
13 years 12 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
CHI
2002
ACM
14 years 8 months ago
An evaluation of a multiple interface design solution for bloated software
This study examines a novel interface design for heavilyfeatured productivity software. The design includes two interfaces between which the user can easily toggle: (1) an interfa...
Joanna McGrenere, Ronald Baecker, Kellogg S. Booth
CHES
2005
Springer
109views Cryptology» more  CHES 2005»
14 years 1 months ago
Security Evaluation Against Electromagnetic Analysis at Design Time
Electromagnetic analysis (EMA) can be used to compromise secret information by analysing the electric and/or magnetic fields emanating from a device. It follows differential power...
Huiyun Li, A. Theodore Markettos, Simon W. Moore