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» Design and implementation of JPEG encoder IP core
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SIPS
2006
IEEE
14 years 1 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
PET
2010
Springer
13 years 11 months ago
Collaborative, Privacy-Preserving Data Aggregation at Scale
Combining and analyzing data collected at multiple locations is critical for a wide variety of applications, such as detecting and diagnosing malicious attacks or computing an acc...
Benny Applebaum, Haakon Ringberg, Michael J. Freed...
WWW
2009
ACM
14 years 2 months ago
A P2P based distributed services network for next generation mobile internet communications
In this poster, we present a novel P2P (Peer to Peer) based distributed services network (DSN), which is a next generation operable and manageable distributed core network archite...
Yang Li, Yi-Chuan Wu, Jian-Ying Zhang, Jin Peng, H...
PC
2007
161views Management» more  PC 2007»
13 years 6 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...
FPL
2004
Springer
171views Hardware» more  FPL 2004»
14 years 23 days ago
A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks
Field Programmable Gate Arrays (FPGAs) can be used in Intrusion Prevention Systems (IPS) to inspect application data contained within network flows. An IPS operating on high-speed...
David V. Schuehler, John W. Lockwood