18 search results - page 3 / 4 » Design and implementation of a multicast-buffer ATM switch |
Publication
The ERICA switch algorithm has been discussed extensively in TM group in the past. However, over the last two years, the algorithm has been substantially modified. This contributio...
INFOCOM
1997
IEEE
13 years 11 months ago
1997
IEEE
Current high-speed packet switching systems, ATM in particular, have large port bu ering requirements. The use of highly integrated ASIC technology for implementing high-degree an...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
HEURISTICS
2000
13 years 7 months ago
2000
Planning and designing the next generation of IP router or switched broadband networks seems a daunting challenge considering the many complex, interacting factors affecting the p...
ICCCN
2007
IEEE
14 years 1 months ago
2007
IEEE
—Multimedia requirements of the 1990’s drove wired and optical network architects to reconsider the inefficiencies of packet switching and consider long proven methods such as...