66 search results - page 4 / 14 » Design and implementation of software-managed caches for mul... |
RTAS
2000
IEEE
14 years 27 days ago
2000
IEEE
Congested networks and overloaded servers resulting from the ever growing number of Internet users contribute to the lack of good quality video streaming over the Internet. We pro...
SIGOPS
2010
13 years 3 months ago
2010
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
CF
2010
ACM
14 years 1 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
VLDB
2007
ACM
14 years 8 months ago
2007
ACM
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
PPOPP
2006
ACM
14 years 2 months ago
2006
ACM
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...