66 search results - page 5 / 14 » Design and implementation of software-managed caches for mul... |
ISCA
2007
IEEE
14 years 2 months ago
2007
IEEE
Hardware transactional memory has great potential to simplify the creation of correct and efficient multithreaded programs, allowing programmers to exploit more effectively the s...
IEEEPACT
2003
IEEE
14 years 1 months ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
SIGMETRICS
1991
ACM
14 years 1 days ago
1991
ACM
Prior to this work, all implementations of stack simulation [MGS70] required more than linear time to process an address trace. In particular these implementations are often slow ...
FCCM
2009
IEEE
14 years 12 days ago
2009
IEEE
FPGA has long been considered an attractive platform for high performance implementations of string matching. However, as the size of pattern dictionaries continues to grow, such ...
HPDC
2012
IEEE
11 years 11 months ago
2012
IEEE
Consider a multithreaded parallel application running inside a multicore virtual machine context that is itself hosted on a multi-socket multicore physical machine. How should the...