This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
R. U. R. Mocho, G. H. Sartori, Renato P. Ribas, An...
We discuss the gap we experience in an industrial design path of high-speed packet switches. As bandwidth demand exceeds progress in CMOS technology, system architects are forced ...
M. Verhappen, P. H. A. van der Putten, Jeroen Voet...
Weconsidertheproblem of optimal, data-dependentzerotree designfor use in weighted universal zerotree codes for image compression.A weighted universalzerotree code (WUZC) is a data...
Model driven code generation has been investigated in traditional and object-oriented design paradigms; significant progress has been made. It offers many advantages including the...
Abstract-- An information theoretic queueing model is proposed in a wireless multiple access communication setup. The proposed symmetric N user model captures physical layer parame...